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NCP5010
Analog Dimming Control
When the NCP5010 is in steady state the output voltage
is controlled in order to have 500 mV to the feedback input
(FB pin). The principle of this schematic is bias by a
resistive network R2/R3 the feedback voltage. If not any
signal is put from outside to R2 there is no voltage drop
across R3 and I OUT = V FB /R4. When the voltage put to R2
is increasing the loop balance output voltage to get always
500 mV to FB pin. Thereby voltage across R4 decreases
like this the current in the string of LEDs.
V Bat
2.7 to 5.5 V
C1
L1
22 m H
LED
C2
1 m F 0805
X5R 25 V
4.7 m F 0603
X5R 6.3 V
ENABLE
A2
CTRL
V OUT
C1
R3
LED
18 k
NCP5010
R4
R1 10 k
R2
24
PWM SIGNAL
C3
470 nF
100 k
L1:
C1:
C2:
C3:
TDK VLF4012AT?220MR51
TDK C1608X5R0J475MT
TDK C2012X5R1E105MT
Standard Capacitor
Average Network
DC VOLTAGE
Select
Figure 33. Dimming Control Using a Filtered PWM Signal or a DC Voltage
DC/DC Boost Application
The NCP5010 can be used as DC/DC Boost converter to
LCD biasing. An external resistive network is connected to
sense the output voltage and close the loop.
deliver constant voltage to powering load like OLED or
V Bat
2.7 to 5.5 V
L1
22 m H
C1
4.7 m F 0603
X5R 6.3 V
Vout + 0.5
R1 ) R2
R1
ENABLE
A2
CTRL
V OUT
C1
15 V / 35 mA
C2
R
290 k
2.2 m F 0805
X5R 25 V
NCP5010
R
10 k
L1:
C1:
C2:
TDK VLF4012AT?220MR51
TDK C1608X5R0J475MT
TDK C2012X5R1E225MT
Figure 34. OLED or LCD Bias Supply
http://onsemi.com
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